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ISCA
2006
IEEE
162views Hardware» more  ISCA 2006»
16 years 20 days ago
Design and Management of 3D Chip Multiprocessors Using Network-in-Memory
Long interconnects are becoming an increasingly important problem from both power and performance perspectives. This motivates designers to adopt on-chip network-based communicati...
Feihui Li, Chrysostomos Nicopoulos, Thomas D. Rich...
DAC
1999
ACM
15 years 11 months ago
Cycle and Phase Accurate DSP Modeling and Integration for HW/SW Co-Verification
We present our practical experience in the modeling and integration of cycle/phase-accurate instruction set architecture (ISA) models of digital signal processors (DSPs) with othe...
Lisa M. Guerra, Joachim Fitzner, Dipankar Talukdar...
SIGCOMM
2010
ACM
15 years 6 months ago
The case for active device drivers
We revisit the device-driver architecture supported by the majority of operating systems, where a driver is a passive object that does not have its own thread of control and is on...
Leonid Ryzhyk, Yanjin Zhu, Gernot Heiser
SACMAT
2011
ACM
14 years 9 months ago
An integrated approach for identity and access management in a SOA context
In this paper, we present an approach for identity and access management (IAM) in the context of (cross-organizational) serviceoriented architectures (SOA). In particular, we deļ¬...
Waldemar Hummer, Patrick Gaubatz, Mark Strembeck, ...
IPPS
2009
IEEE
16 years 1 months ago
Annotation-based empirical performance tuning using Orio
In many scientific applications, significant time is spent tuning codes for a particular highperformance architecture. Tuning approaches range from the relatively nonintrusive (...
Albert Hartono, Boyana Norris, Ponnuswamy Sadayapp...