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MEMOCODE
2008
IEEE
16 years 1 months ago
Estimating the Performance of Cache Replacement Policies
—Caches are commonly employed to hide the latency gap between memory and the CPU by exploiting locality in memory accesses. The cache performance strongly influences a system’...
Daniel Grund, Jan Reineke
CGO
2007
IEEE
16 years 1 months ago
Exploiting Narrow Accelerators with Data-Centric Subgraph Mapping
The demand for high performance has driven acyclic computation accelerators into extensive use in modern embedded and desktop architectures. Accelerators that are ideal from a sof...
Amir Hormati, Nathan Clark, Scott A. Mahlke
ASPDAC
2006
ACM
143views Hardware» more  ASPDAC 2006»
16 years 21 days ago
Constraint-driven bus matrix synthesis for MPSoC
– Modern multi-processor system-on-chip (MPSoC) designs have high bandwidth constraints which must be satisfied by the underlying communication architecture. Bus matrix based com...
Sudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdha...
ANCS
2005
ACM
16 years 9 days ago
High-throughput linked-pattern matching for intrusion detection systems
This paper presents a hardware architecture for highly efficient intrusion detection systems. In addition, a software tool for automatically generating the hardware is presented....
Zachary K. Baker, Viktor K. Prasanna
INFOCOM
2003
IEEE
16 years 18 hour ago
Network Layer Support for Service Discovery in Mobile Ad Hoc Networks
— Service discovery is an integral part of the ad hoc networking to achieve stand-alone and self-configurable communication networks. In this paper, we discuss possible service ...
Ulas C. Kozat, Leandros Tassiulas