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ASPLOS
2010
ACM
16 years 1 months ago
Cortical architectures on a GPGPU
As the number of devices available per chip continues to increase, the computational potential of future computer architectures grows likewise. While this is a clear benefit for f...
Andrew Nere, Mikko Lipasti
MICRO
2008
IEEE
124views Hardware» more  MICRO 2008»
16 years 1 months ago
SHARK: Architectural support for autonomic protection against stealth by rootkit exploits
Rootkits have become a growing concern in cyber-security. Typically, they exploit kernel vulnerabilities to gain root privileges of a system and conceal malware’s activities fro...
Vikas R. Vasisht, Hsien-Hsin S. Lee
ISCA
2006
IEEE
133views Hardware» more  ISCA 2006»
16 years 27 days ago
TRAP-Array: A Disk Array Architecture Providing Timely Recovery to Any Point-in-time
RAID architectures have been used for more than two decades to recover data upon disk failures. Disk failure is just one of the many causes of damaged data. Data can be damaged by...
Qing Yang, Weijun Xiao, Jin Ren
CODES
2005
IEEE
16 years 15 days ago
Designing real-time H.264 decoders with dataflow architectures
High performance microprocessors are designed with generalpurpose applications in mind. When it comes to embedded applications, these architectures typically perform controlintens...
Youngsoo Kim, Suleyman Sair
GLVLSI
2010
IEEE
164views VLSI» more  GLVLSI 2010»
15 years 12 months ago
Performance and energy trade-offs analysis of L2 on-chip cache architectures for embedded MPSoCs
On-chip memory organization is one of the most important aspects that can influence the overall system behavior in multiprocessor systems. Following the trend set by high-perform...
Mohamed M. Sabry, Martino Ruggiero, Pablo Garcia D...