4772 search results - page 133 / 955 » An approach to interface synthesis |
144
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DATE
2009
IEEE
16 years 1 months ago
2009
IEEE
: Common sub-expression elimination (CSE) serves as a useful optimization technique in the synthesis of arithmetic datapaths described at RTL. However, CSE has a limited potential ...
151
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IRI
2008
IEEE
16 years 27 days ago
2008
IEEE
— We revisit the problem of synthesis of service composition in the context of service oriented architecture from a tree automata perspective. Comparing to existing finite state...
165
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AHS
2007
IEEE
16 years 26 days ago
2007
IEEE
In this paper, we present a new approach for automatic synthesis of fault detection modules for autonomous mobile robots. The method relies on the fact that hardware faults typica...
171
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DATE
2006
IEEE
16 years 17 days ago
2006
IEEE
— Clock power consumes a significant fraction of total power dissipation in high speed precharge/evaluate logic styles. In this paper, we present a novel low-cost design methodol...
108
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DATE
2006
IEEE
16 years 17 days ago
2006
IEEE
In recent years, Assertion-Based Verification is being widely accepted as a key technology in the pre-silicon validation of system-on-chip(SOC) designs. The System Verilog langua...