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» An analytical model for cache replacement policy performance
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ISLPED
2005
ACM
108views Hardware» more  ISLPED 2005»
15 years 11 months ago
Replacing global wires with an on-chip network: a power analysis
This paper explores the power implications of replacing global chip wires with an on-chip network. We optimize network links by varying repeater spacing, link pipelining, and volt...
Seongmoo Heo, Krste Asanovic
ISCA
2007
IEEE
143views Hardware» more  ISCA 2007»
16 years 13 days ago
Interconnect design considerations for large NUCA caches
The ever increasing sizes of on-chip caches and the growing domination of wire delay necessitate significant changes to cache hierarchy design methodologies. Many recent proposal...
Naveen Muralimanohar, Rajeev Balasubramonian
ICDE
2005
IEEE
158views Database» more  ICDE 2005»
16 years 7 months ago
Cache-Conscious Automata for XML Filtering
Hardware cache behavior is an important factor in the performance of memory-resident, data-intensive systems such as XML filtering engines. A key data structure in several recent ...
Bingsheng He, Qiong Luo, Byron Choi
SIGMOD
2008
ACM
109views Database» more  SIGMOD 2008»
16 years 6 months ago
Cooperative XPath caching
Motivated by the fact that XML is increasingly being used in distributed applications, we propose building a cooperative caching scheme for XML documents. Our scheme allows sharin...
Kostas Lillis, Evaggelia Pitoura
DATE
2008
IEEE
155views Hardware» more  DATE 2008»
16 years 18 days ago
Comparison of memory write policies for NoC based Multicore Cache Coherent Systems
The following study shows a direct comparison of memory write policies in Shared Memory Multicore Systems. Although there are much work and many studies about this issue, our work...
Pierre Guironnet de Massas, Frédéric...