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332
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EH
1999
IEEE
1999
IEEE
Evolvable Hardware or Learning Hardware? Induction of State Machines from Temporal Logic Constraints
15 years 11 months ago
Here we advocate an approach to learning hardware based on induction of finite state machines from temporal logic constraints. The method involves training on examples, constraint...
166
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HPDC
1999
IEEE
15 years 10 months ago
1999
IEEE
Efficient and robust metacomputing requires the decomposition of complex jobs into tasks that must be scheduled on distributed processing nodes. There are various ways of creating...
142
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ICCAD
1999
IEEE
15 years 10 months ago
1999
IEEE
This paper considers the problem of determining an optimal clock skew schedule for a synchronous VLSI circuit. A novel formulation of clock skew scheduling as a constrained quadrat...
169
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FPGA
1999
ACM
15 years 10 months ago
1999
ACM
The demand for high-speed FPGA compilation tools has occurred for three reasons: first, as FPGA device capacity has grown, the computation time devoted to placement and routing h...
165
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SIGCOMM
1998
ACM
15 years 10 months ago
1998
ACM
In Layer Four switching, the route and resources allocated to a packet are determined by the destination address as well as other header elds of the packet such as source address,...