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175
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DAC
2008
ACM
16 years 7 months ago
2008
ACM
An effective technique to save power during scan based test is to switch off unused scan chains. The results obtained with this method strongly depend on the mapping of scan flip-...
191
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DAC
2008
ACM
16 years 7 months ago
2008
ACM
Soft errors, once only of concern in memories, are beginning to affect logic as well. Determining the soft error rate (SER) of a combinational circuit involves three main masking ...
192
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DAC
2007
ACM
16 years 7 months ago
2007
ACM
The memory hierarchy of a system can consume up to 50% of microprocessor system power. Previous work has shown that tuning a configurable cache to a particular application can red...
167
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DAC
2007
ACM
16 years 7 months ago
2007
ACM
We present an efficient technique for finding the mean and variance of the full-chip leakage of a candidate design, while considering logic-structures and both die-to-die and with...
189
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DAC
2004
ACM
16 years 7 months ago
2004
ACM
A five-fold increase in leakage current is predicted with each technology generation. While Dynamic Voltage Scaling (DVS) is known to reduce dynamic power consumption, it also cau...