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198
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VLSID
2005
IEEE
123views VLSI» more  VLSID 2005»
16 years 7 months ago
Variance Reduction in Monte Carlo Capacitance Extraction
In this article we address efficiency issues in implementation of Monte Carlo algorithm for 3D capacitance extraction. Error bounds in statistical capacitance estimation are discus...
Shabbir H. Batterywala, Madhav P. Desai
VLSID
2005
IEEE
140views VLSI» more  VLSID 2005»
16 years 7 months ago
Variable Resizing for Area Improvement in Behavioral Synthesis
High level synthesis tools transform an algorithmic description to a register transfer language (RTL) description of the hardware. The algorithm behavior is typically described in...
R. Gopalakrishnan, Rajat Moona
ICPR
2010
IEEE
16 years 1 months ago
Integrating a Discrete Motion Model into GMM Based Background Subtraction
GMM based algorithms have become the de facto standard for background subtraction in video sequences, mainly because of their ability to track multiple background distributions, w...
Christian Wolf, Jolion Jolion
163
Voted
ISBI
2009
IEEE
16 years 1 months ago
Accelerating Regularized Iterative CT Reconstruction on Commodity Graphics Hardware (GPU)
Iterative reconstruction algorithms augmented with regularization can produce high-quality reconstructions from few views and even in the presence of significant noise. In this pa...
Wei Xu, Klaus Mueller
170
Voted
QEST
2009
IEEE
16 years 1 months ago
Simulation-Based CTMC Model Checking: An Empirical Evaluation
This paper provides an experimental study of the efficiency of simulation-based model-checking algorithms for continuous-time Markov chains by comparing: MRMC – the only tool t...
Joost-Pieter Katoen, Ivan S. Zapreev