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ATVA
2007
Springer
150views Hardware» more  ATVA 2007»
15 years 10 months ago
3-Valued Circuit SAT for STE with Automatic Refinement
Abstract. Symbolic Trajectory Evaluation (STE) is a powerful technique for hardware model checking. It is based on a 3-valued symbolic simulation, using 0,1 and X n"), where t...
Orna Grumberg, Assaf Schuster, Avi Yadgar
CASES
2007
ACM
15 years 10 months ago
Performance-driven syntax-directed synthesis of asynchronous processors
The development of robust and efficient synthesis tools is important if asynchronous design is to gain more widespread acceptance. Syntax-directed translation is a powerful synthe...
Luis A. Plana, Doug A. Edwards, Sam Taylor, Luis A...
153
Voted
FAST
2010
15 years 9 months ago
A Clean-Slate Look at Disk Scrubbing
A number of techniques have been proposed to reduce the risk of data loss in hard-drives, from redundant disks (e.g., RAID systems) to error coding within individual drives. Disk ...
Alina Oprea, Ari Juels
APN
2008
Springer
15 years 8 months ago
Modeling and Analysis of Security Protocols Using Role Based Specifications and Petri Nets
Abstract. In this paper, we introduce a framework composed of a syntax and its compositional Petri net semantics, for the specification and verification of properties (like authent...
Roland Bouroulet, Raymond R. Devillers, Hanna Klau...
ESOP
2008
Springer
15 years 8 months ago
Open Bisimulation for the Concurrent Constraint Pi-Calculus
Abstract. The concurrent constraint pi-calculus (cc-pi-calculus) has been introduced as a model for concluding Service Level Agreements. The cc-pi calculus combines the synchronous...
Maria Grazia Buscemi, Ugo Montanari