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» An adaptive performance modeling tool for GPU architectures
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CGO
2010
IEEE
16 years 1 months ago
Automatic creation of tile size selection models
Tiling is a widely used loop transformation for exposing/exploiting parallelism and data locality. Effective use of tiling requires selection and tuning of the tile sizes. This is...
Tomofumi Yuki, Lakshminarayanan Renganarayanan, Sa...
CDC
2009
IEEE
108views Control Systems» more  CDC 2009»
15 years 11 months ago
Stability Overlay for linear and nonlinear time-varying plants
— This paper proposes a strategy referred to as Stability Overlay (SO) for linear and nonlinear time-varying plants, that provides input/output stability guarantees for a wide se...
Paulo Andre Nobre Rosa, Jeff S. Shamma, Carlos Sil...
SBACPAD
2008
IEEE
170views Hardware» more  SBACPAD 2008»
16 years 22 days ago
Using Analytical Models to Efficiently Explore Hardware Transactional Memory and Multi-Core Co-Design
Transactional memory is emerging as a parallel programming paradigm for multi-core processors. Despite the recent interest in transactional memory, there has been no study to char...
James Poe, Chang-Burm Cho, Tao Li
HPCC
2007
Springer
16 years 15 days ago
Towards a Complexity Model for Design and Analysis of PGAS-Based Algorithms
Many new Partitioned Global Address Space (PGAS) programming languages have recently emerged and are becoming ubiquitously available on nearly all modern parallel architectures. PG...
Mohamed Bakhouya, Jaafar Gaber, Tarek A. El-Ghazaw...
TPHOL
2009
IEEE
16 years 1 months ago
A Better x86 Memory Model: x86-TSO
Abstract. Real multiprocessors do not provide the sequentially consistent memory that is assumed by most work on semantics and verification. Instead, they have relaxed memory mode...
Scott Owens, Susmit Sarkar, Peter Sewell