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ARITH
2005
IEEE
15 years 11 months ago
The Vector Floating-Point Unit in a Synergistic Processor Element of a CELL Processor
The floating-point unit in the Synergistic Processor Element of the 1st generation multi-core CELL Processor is described. The FPU supports 4-way SIMD single precision and intege...
Silvia M. Müller, Christian Jacobi 0002, Hwa-...
IPPS
2010
IEEE
15 years 3 months ago
Solving the advection PDE on the cell broadband engine
In this paper we present the venture of porting two different algorithms for solving the two-dimensional advection PDE on the CBE platform, an in-place and an outof-place one, and ...
Georgios Rokos, Gerassimos Peteinatos, Georgia Kou...
ICPP
2007
IEEE
16 years 7 days ago
An Effective Strategy for Porting C++ Applications on Cell
In this paper we present a solution for efficient porting of sequential C++ applications on the Cell B.E. processor. We present our step-by-step approach, focusing on its general...
Ana Lucia Varbanescu, Henk J. Sips, Kenneth A. Ros...
ISPD
1999
ACM
128views Hardware» more  ISPD 1999»
15 years 10 months ago
Transistor level micro-placement and routing for two-dimensional digital VLSI cell synthesis
There is an increasing need in modern VLSI designs for circuits implemented in high-performance logic families such as Cascode Voltage Switch Logic, Pass Transistor Logic, and dom...
Michael A. Riepe, Karem A. Sakallah
ISCAS
2005
IEEE
133views Hardware» more  ISCAS 2005»
15 years 11 months ago
Multiobjective VLSI cell placement using distributed simulated evolution algorithm
— Simulated Evolution (SimE) is a sound stochastic approximation algorithm based on the principles of adaptation. If properly engineered it is possible for SimE to reach nearopti...
Sadiq M. Sait, Ali Mustafa Zaidi, Mustafa I. Ali