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DATE
1997
IEEE
114views Hardware» more  DATE 1997»
15 years 11 months ago
Compact structural test generation for analog macros
A structural, fault-model based methodology for the generation of compact high-quality test sets for analog macros is presented. Results are shown for an IVconverter macro design....
V. Kaal, Hans G. Kerkhoff
FLAIRS
2004
15 years 8 months ago
Prototype Based Classifier Design with Pruning
An algorithm is proposed to prune the prototype vectors (prototype selection) used in a nearest neighbor classifier so that a compact classifier can be obtained with similar or ev...
Jiang Li, Michael T. Manry, Changhua Yu
ICCAD
2003
IEEE
141views Hardware» more  ICCAD 2003»
16 years 1 days ago
An Enhanced Multilevel Algorithm for Circuit Placement
This paper presents several important enhancements to the recently published multilevel placement package mPL [12]. The improvements include (i) unconstrained quadratic relaxation...
Tony F. Chan, Jason Cong, Tim Kong, Joseph R. Shin...
IPPS
1999
IEEE
15 years 11 months ago
Reconfigurable Parallel Sorting and Load Balancing: HeteroSort
HeteroSort load balances and sorts within static or dynamic networks. Upon failure of a node or path, HeteroSort uses a genetic algorithm to minimize the distribution path by optim...
Emmett Davis, Bonnie Holte Bennett, Bill Wren, Lin...
ICPP
2005
IEEE
16 years 10 days ago
Filter Decomposition for Supporting Coarse-Grained Pipelined Parallelism
We consider the filter decomposition problem in supporting coarse-grained pipelined parallelism. This form of parallelism is suitable for data-driven applications in scenarios wh...
Wei Du, Gagan Agrawal