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RECONFIG
2008
IEEE
225views VLSI» more  RECONFIG 2008»
16 years 1 months ago
A Hardware Filesystem Implementation for High-Speed Secondary Storage
Platform FPGAs are capable of hosting entire Linuxbased systems including standard peripherals, integrated network interface cards and even disk controllers on a single chip. File...
Ashwin A. Mendon, Ron Sass
VISUALIZATION
2003
IEEE
15 years 12 months ago
Producing High Quality Visualizations of Large-Scale Simulations
This paper describes the work of a team of researchers in computer graphics, geometric computing, and civil engineering to produce a visualization of the September 2001 attack on ...
Voicu Popescu, Chris Hoffmann, Sami Kilic, Mete So...
HPDC
1997
IEEE
15 years 11 months ago
A Secure Communications Infrastructure for High-Performance Distributed Computing
We describe a software infrastructure designed to support the development of applications that use high-speed networks to connect geographically distributed supercomputers, databa...
Ian T. Foster, Nicholas T. Karonis, Carl Kesselman...
PC
2007
161views Management» more  PC 2007»
15 years 6 months ago
High performance combinatorial algorithm design on the Cell Broadband Engine processor
The Sony–Toshiba–IBM Cell Broadband Engine (Cell/B.E.) is a heterogeneous multicore architecture that consists of a traditional microprocessor (PPE) with eight SIMD co-process...
David A. Bader, Virat Agarwal, Kamesh Madduri, Seu...
RTAS
1997
IEEE
15 years 10 months ago
Scalable Hardware Priority Queue Architectures for High-Speed Packet Switches
ÐWith effective packet-scheduling mechanisms, modern integrated networks can support the diverse quality-of-service requirements of emerging applications. However, arbitrating bet...
Sung-Whan Moon, Kang G. Shin, Jennifer Rexford