Memory-intensive behaviors often contain large arrays that are synthesized into off-chip memories. With the increasing gap between on-chip and off-chip memory access delays, it is...
Preeti Ranjan Panda, Nikil D. Dutt, Alexandru Nico...
The performance tradeoff between hardware complexity and clock speed is studied. First, a generic superscalar pipeline is defined. Then the specific areas of register renaming, ...
Subbarao Palacharla, Norman P. Jouppi, James E. Sm...
In an open network such as the Internet, multicast security services typically start with group session-key distribution. Considering scalability for group communication among wide...
Human-computer interaction is multidisciplinary, drawing paradigms and techniques from both the natural sciences and the design disciplines. HCI cannot be considered a pure natura...
In this paper we present a methodology and techniques for generating cycle-accurate macro-models for RTlevel power analysis. The proposed macro-model predicts not only...