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» An Experimental Analysis of Parallel
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ASPLOS
2010
ACM
16 years 1 months ago
COMPASS: a programmable data prefetcher using idle GPU shaders
A traditional fixed-function graphics accelerator has evolved into a programmable general-purpose graphics processing unit over the last few years. These powerful computing cores...
Dong Hyuk Woo, Hsien-Hsin S. Lee
CCGRID
2008
IEEE
16 years 1 months ago
Advanced RDMA-Based Admission Control for Modern Data-Centers
—Current data-centers employ admission control mechanism to maintain low response time and high throughput under overloaded scenarios. Existing mechanisms use internal (on the ov...
Ping Lai, Sundeep Narravula, Karthikeyan Vaidyanat...
GMP
2008
IEEE
161views Solid Modeling» more  GMP 2008»
16 years 1 months ago
Slit Map: Conformal Parameterization for Multiply Connected Surfaces
Surface parameterization is a fundamental tool in geometric modeling and processing. Most existing methods deal with simply connected disks. This work introduces a novel method to ...
Xiaotian Yin, Junfei Dai, Shing-Tung Yau, Xianfeng...
ISVLSI
2008
IEEE
143views VLSI» more  ISVLSI 2008»
16 years 1 months ago
BTB Access Filtering: A Low Energy and High Performance Design
Powerful branch predictors along with a large branch target buffer (BTB) are employed in superscalar processors for instruction-level parallelism exploitation. However, the large ...
Shuai Wang, Jie Hu, Sotirios G. Ziavras
DATE
2007
IEEE
95views Hardware» more  DATE 2007»
16 years 29 days ago
Memory bank aware dynamic loop scheduling
In a parallel system with multiple CPUs, one of the key problems is to assign loop iterations to processors. This problem, known as the loop scheduling problem, has been studied i...
Mahmut T. Kandemir, Taylan Yemliha, Seung Woo Son,...
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