This paper derives a methodology for developing accurate convex delay models to be used for transistor sizing. A new rich class of convex functions to model gate delay is presente...
Mahesh Ketkar, Kishore Kasamsetty, Sachin S. Sapat...
1 Although processing speed, storage capacity and network bandwidth are steadily increasing, network latency remains a bottleneck for scientists accessing large remote data sets. T...
A straightforward discretisation of problems in d spatial dimensions often leads to an exponential growth in the number of degrees of freedom. Thus, even efficient algorithms like ...
Abstract. Decision making in engineering design can be effectively addressed by using genetic algorithms to solve multi-objective problems. These multi-objective genetic algorithm...
In this paper we propose a framework for the computational extraction of time characteristics of a single choreographic work. Computational frameworks can aid in revealing nonsali...
Vidyarani M. Dyaberi, Hari Sundaram, Thanassis Rik...