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» An Engineering Approach to Formal Methods
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CHARME
2005
Springer
136views Hardware» more  CHARME 2005»
16 years 7 days ago
Acceleration of SAT-Based Iterative Property Checking
Today, verification is becoming the dominating factor for successful circuit designs. In this context formal verification techniques allow to prove the correctness of a circuit ...
Daniel Große, Rolf Drechsler
PROMAS
2005
Springer
16 years 5 days ago
Declarative Agent Programming Support for a FIPA-Compliant Agent Platform
Multi-agent system(MAS) is a blooming research area, which exhibits a new paradigm for the design, modelling and implementation of complex systems. A significant amount of effort...
Mengqiu Wang, Mariusz Nowostawski, Martin K. Purvi...
FMCAD
2007
Springer
15 years 10 months ago
Circuit Level Verification of a High-Speed Toggle
As VLSI fabrication technology progresses to 65nm feature sizes and smaller, transistors no longer operate as ideal switches. This motivates verifying digital circuits using contin...
Chao Yan, Mark R. Greenstreet
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VAMOS
2009
Springer
16 years 1 months ago
Some Challenges of Feature-based Merging of Class Diagrams
In software product line engineering, feature models enable to automate the generation of productspecific models in conjunction with domain “base models” (e.g. UML models). T...
Germain Saval, Jorge Pinna Puissant, Patrick Heyma...
IWPC
2003
IEEE
15 years 12 months ago
Using Run-Time Data for Program Comprehension
Traditional approaches for program comprehension use static program analysis or dynamic program analysis in the form of execution traces. Our approach, however, makes use of runti...
Thomas Gschwind, Johann Oberleitner, Martin Pinzge...