This paper proposes a cycle accounting architecture for Simultaneous Multithreading (SMT) processors that estimates the execution times for each of the threads had they been execu...
FShell is an automated white-box test-input generator for C programs, computing test data with respect to user-specified code coverage criteria. The pillars of FShell are the decl...
Andreas Holzer, Daniel Kroening, Christian Schallh...
Conventional register transfer level (RTL) debugging is based on overlaying simulation results on structural connectivity information of the Hardware Description Language (HDL) so...
Despite the relevance of the belief-desire-intention (BDI) model of rational agency, little work has been done to deal with its two main limitations: the lack of learning competen...
This paper discusses conditions under which some of the “higher level” mental concepts applicable to human beings might also be applicable to artificial agents. The key idea ...