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» An Architecture for Compressive Imaging
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ICIP
2000
IEEE
16 years 8 months ago
Performance Analysis of an H.263 Video Encoder for VIRAM
VIRAM (Vector Intelligent Random Access Memory) is a vector architecture processor with embedded memory, designed for portable multimedia processing devices. Its vector processing...
Thinh P. Q. Nguyen, Avideh Zakhor, Katherine A. Ye...
ICIP
2008
IEEE
16 years 1 months ago
A new theoretic framework for cross-layer optimization
Cross-layer optimization aims at improving the performance of network users operating in a time-varying, error-prone wireless environment. However, current solutions often rely on...
Fangwen Fu, Mihaela van der Schaar
ERCIMDL
2005
Springer
82views Education» more  ERCIMDL 2005»
16 years 2 days ago
A Native XML Database Supporting Approximate Match Search
XML is becoming the standard representation format for metadata. Metadata for multimedia documents, as for instance MPEG-7, require approximate match search functionalities to be s...
Giuseppe Amato, Franca Debole
VLSISP
2008
173views more  VLSISP 2008»
15 years 6 months ago
Fast Bit Gather, Bit Scatter and Bit Permutation Instructions for Commodity Microprocessors
Advanced bit manipulation operations are not efficiently supported by commodity word-oriented microprocessors. Programming tricks are typically devised to shorten the long sequence...
Yedidya Hilewitz, Ruby B. Lee
ICCAD
2004
IEEE
101views Hardware» more  ICCAD 2004»
16 years 3 months ago
Frugal linear network-based test decompression for drastic test cost reductions
— In this paper we investigate an effective approach to construct a linear decompression network in the multiple scan chain architecture. A minimal pin architecture, complemented...
Wenjing Rao, Alex Orailoglu, G. Su