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ICASSP
2010
IEEE
15 years 4 months ago
Bandwidth-intensive FPGA architecture for multi-dimensional DFT
Multi-dimensional (MD) Discrete Fourier Transform (DFT) is a key kernel algorithm in many signal processing algorithms, including radar data processing and medical imaging. Althou...
Chi-Li Yu, Chaitali Chakrabarti, Sungho Park, Vija...
ASAP
2008
IEEE
146views Hardware» more  ASAP 2008»
16 years 1 months ago
A multi-FPGA application-specific architecture for accelerating a floating point Fourier Integral Operator
Many complex systems require the use of floating point arithmetic that is exceedingly time consuming to perform on personal computers. However, floating point operators are also h...
Jason Lee, Lesley Shannon, Matthew J. Yedlin, Gary...
ISMAR
2007
IEEE
16 years 26 days ago
Laser Pointer Tracking in Projector-Augmented Architectural Environments
We present a system that applies a custom-built pan-tilt-zoom camera for laser-pointer tracking in arbitrary real environments. Once placed in a building environment, it carries o...
Daniel Kurz, Ferry Hantsch, Max Grosse, Alexander ...
ICIAR
2005
Springer
16 years 3 days ago
Scalable e-Learning Multimedia Adaptation Architecture
A neglected challenge in existing e-Learning (eL) systems is providing access to multimedia to all users regardless of environmental conditions such as diverse device capabilities,...
Mazen Almaoui, Konstantinos N. Plataniotis
ESTIMEDIA
2004
Springer
15 years 12 months ago
Data assignment and access scheduling exploration for multi-layer memory architectures
Abstract— This paper presents an exploration framework which performs data assignment and access scheduling exploration for applications given a multilayer memory architecture. O...
Radoslaw Szymanek, Francky Catthoor, Krzysztof Kuc...