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ICCD
1999
IEEE
86views Hardware» more  ICCD 1999»
15 years 11 months ago
Evaluation of Computing in Memory Architectures for Digital Image Processing Applications
Continuing improvements in semiconductor density are enabling new classes of System-on-a-Chip architectures that combine extensive processing logic and high-density memory. Many o...
David L. Landis, Paul T. Hulina, Scott Deno, Luke ...
ISNN
2007
Springer
16 years 1 months ago
Two-Dimensional Bayesian Subspace Analysis for Face Recognition
Bayesian subspace analysis (BSA) has been successfully applied in data mining and pattern recognition. However, due to the use of probabilistic measure of similarity, it often need...
Daoqiang Zhang
EUROPAR
2001
Springer
15 years 11 months ago
A Software Architecture for User Transparent Parallel Image Processing on MIMD Computers
Abstract. This paper describes a software architecture that allows image processing researchers to develop parallel applications in a transparent manner. The architecture’s main ...
Frank J. Seinstra, Dennis Koelma, Jan-Mark Geusebr...
SSWMC
2004
15 years 8 months ago
Quantitative evaluation of pairs and RS steganalysis
We give initial results from a new project which performs statistically accurate evaluation of the reliability of image steganalysis algorithms. The focus here is on the Pairs and...
Andrew D. Ker
DCC
2003
IEEE
16 years 6 months ago
Compression of RADARSAT Data with Block Adaptive Wavelets
: This paper proposes a new algorithm referred to as the Wavelet Packet-based Embedded Block coding (WPEB) scheme for SAR data compression. This algorithm combines the following pr...
Ian G. Cumming, Jing Wang