Sciweavers

2545 search results - page 241 / 509
» An Architectural Discussion on DSPL
Sort
View
DATE
2003
IEEE
87views Hardware» more  DATE 2003»
16 years 1 days ago
FPGA-Based Implementation of a Serial RSA Processor
In this paper we present an hardware implementation of the RSA algorithm for public-key cryptography. The RSA algorithm consists in the computation of modular exponentials on larg...
Antonino Mazzeo, Luigi Romano, Giacinto Paolo Sagg...
DATE
2003
IEEE
154views Hardware» more  DATE 2003»
16 years 1 days ago
Packetized On-Chip Interconnect Communication Analysis for MPSoC
Interconnect networks play a critical role in shared memory multiprocessor systems-on-chip (MPSoC) designs. MPSoC performance and power consumption are greatly affected by the pac...
Terry Tao Ye, Luca Benini, Giovanni De Micheli
EDOC
2003
IEEE
16 years 1 days ago
Integrating CBSE, SoC, MDA, and AOP in a Software Development Method
Component-Based Software Engineering, Separation of Concerns, Model-Driven Architecture, and Aspect-Oriented Programming are four active research areas that have been around for s...
Raul Silaghi, Alfred Strohmeier
HICSS
2003
IEEE
126views Biometrics» more  HICSS 2003»
16 years 1 days ago
Measuring Cognitive Load with EventStream Software Framework
We have constructed “EventStream” data collection and analysis software framework to support a wide variety of sensors that measure user’s physical state. The framework’s ...
Christoph Aschwanden, Jan Stelovsky
ICDAR
2003
IEEE
16 years 1 days ago
A Novel Feature Extraction Technique for the Recognition of Segmented Handwritten Characters
High accuracy character recognition techniques can provide useful information for segmentation-based handwritten word recognition systems. This research describes neural network-b...
Michael Blumenstein, Brijesh Verma, H. Basli