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» An Architectural Discussion on DSPL
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DFT
2003
IEEE
132views VLSI» more  DFT 2003»
16 years 3 days ago
Level-Hybrid Optoelectronic TESH Interconnection Network
This paper discusses a hybrid optoelectronic scheme for a new interconnection network, "Tori connected mESHes (TESH)". The major features of TESH are the following: it i...
Vijay K. Jain, Glenn H. Chapman
IPPS
2003
IEEE
16 years 3 days ago
Modeling Parallel Applications Performance on Heterogeneous Systems
The current technologies have made it possible to execute parallel applications across heterogeneous platforms. However, the performance models available do not provide adequate m...
Jameela Al-Jaroodi, Nader Mohamed, Hong Jiang, Dav...
IPPS
2003
IEEE
16 years 3 days ago
ECO: An Empirical-Based Compilation and Optimization System
In this paper, we describe a compilation system that automates much of the process of performance tuning that is currently done manually by application programmers interested in h...
Nastaran Baradaran, Jacqueline Chame, Chun Chen, P...
ITC
2003
IEEE
149views Hardware» more  ITC 2003»
16 years 2 days ago
BIST for Xilinx 4000 and Spartan Series FPGAs: A Case Study
Abstract: We discuss the development of Built-In SelfTest (BIST) configurations that test all of the programmable logic and interconnect resources in the core of Xilinx 4000E, 4000...
Charles E. Stroud, Keshia N. Leach, Thomas A. Slau...
MIR
2003
ACM
169views Multimedia» more  MIR 2003»
16 years 2 days ago
Design, implementation and testing of an interactive video retrieval system
In this paper we present and discuss the system we developed for the search task of the TRECVID 2002, and its evaluation in an interactive search task. To do this we will look at ...
Georgina Gaughan, Alan F. Smeaton, Cathal Gurrin, ...