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» An Architectural Design for Digital Objects
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FPL
1999
Springer
103views Hardware» more  FPL 1999»
15 years 10 months ago
IP Validation for FPGAs Using Hardware Object Technology
Although verification and simulation tools are always improving, the results they provide remain hard to analyze and interpret. On one hand, verification sticks to the functional ...
Steve Casselman, John Schewel, Christophe Beaumont
KBSE
2010
IEEE
15 years 4 months ago
Analyzing security architectures
We present a semi-automated approach, Secoria, for analyzing a security runtime architecture for security and for conformance to an object-oriented implementation. Typecheckable a...
Marwan Abi-Antoun, Jeffrey M. Barnes
CDES
2010
184views Hardware» more  CDES 2010»
15 years 4 months ago
Delay-Insensitive Cell Matrix
This paper describes the design of a delay-insensitive (DI) Cell Matrix. This architecture allows for massively parallel, self-determined operation and can be used to implement reg...
Scott Smith, David Roclin, Jia Di
TABLETOP
2007
IEEE
16 years 16 days ago
The TViews Table in the Home
The past several years of computer interaction research have shown an increasing interest in tabletops for shared user interactions through touch or tangible objects. Digital medi...
Ali Mazalek, Matthew Reynolds, Glorianna Davenport
GECCO
2007
Springer
181views Optimization» more  GECCO 2007»
15 years 10 months ago
Combining bond-graphs with genetic programming for unified/automated design of mechatronic or multi domain dynamic systems
The multi domain nature of a mechatronic system makes it difficult to model using a single modeling technique over the whole system as varying sets of system variables are require...
Saheeb Ahmed Kayani, Muhammad Afzaal Malik