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» An Architectural Design for Digital Objects
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ANCS
2007
ACM
15 years 10 months ago
Ruler: high-speed packet matching and rewriting on NPUs
Programming specialized network processors (NPU) is inherently difficult. Unlike mainstream processors where architectural features such as out-of-order execution and caches hide ...
Tomas Hruby, Kees van Reeuwijk, Herbert Bos
ASPLOS
2008
ACM
15 years 8 months ago
Tapping into the fountain of CPUs: on operating system support for programmable devices
The constant race for faster and more powerful CPUs is drawing to a close. No longer is it feasible to significantly increase the speed of the CPU without paying a crushing penalt...
Yaron Weinsberg, Danny Dolev, Tal Anker, Muli Ben-...
CCS
2008
ACM
15 years 8 months ago
Code injection attacks on harvard-architecture devices
Harvard architecture CPU design is common in the embedded world. Examples of Harvard-based architecture devices are the Mica family of wireless sensors. Mica motes have limited me...
Aurélien Francillon, Claude Castelluccia
SACMAT
2011
ACM
14 years 9 months ago
An integrated approach for identity and access management in a SOA context
In this paper, we present an approach for identity and access management (IAM) in the context of (cross-organizational) serviceoriented architectures (SOA). In particular, we deļ¬...
Waldemar Hummer, Patrick Gaubatz, Mark Strembeck, ...
ISLPED
2009
ACM
168views Hardware» more  ISLPED 2009»
16 years 1 months ago
A 60fps 496mW multi-object recognition processor with workload-aware dynamic power management
An energy efficient object recognition processor is proposed for real-time visual applications. Its energy efficiency is improved by lowering average power consumption while susta...
Joo-Young Kim, Seungjin Lee, Jinwook Oh, Minsu Kim...