1945 search results - page 204 / 389 » An Architectural Design for Digital Objects |
185
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DAC
2010
ACM
15 years 10 months ago
2010
ACM
—Discrete gate sizing is one of the most commonly used, flexible, and powerful techniques for digital circuit optimization. The underlying problem has been proven to be NP-hard ...
129
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DAC
2009
ACM
16 years 7 months ago
2009
ACM
For a number of years, dataflow concepts have provided designers of digital signal processing systems with environments capable of expressing high-level software architectures as ...
170
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DAC
2011
ACM
14 years 6 months ago
2011
ACM
A three-dimensional (3D) CMOS imager constructed from stacking a pixel array of image sensors, an analog-to-digital converter (ADC) array, and an image signal processor (ISP) arra...
196
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CODES
2007
IEEE
15 years 10 months ago
2007
IEEE
System-level and Platform-based design, along with Transaction Level modeling (TLM) techniques and languages like SystemC, appeared as a response to the ever increasing complexity...
166
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ISCA
2009
IEEE
16 years 1 months ago
2009
IEEE
While microprocessor designers turn to multicore architectures to sustain performance expectations, the dramatic increase in parallelism of such architectures will put substantial...