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» An Architectural Design for Digital Objects
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CC
2008
Springer
240views System Software» more  CC 2008»
15 years 8 months ago
Hardware JIT Compilation for Off-the-Shelf Dynamically Reconfigurable FPGAs
JIT compilation is a model of execution which translates at run time critical parts of the program to a low level representation. Typically a JIT compiler produces machine code fro...
Etienne Bergeron, Marc Feeley, Jean-Pierre David
FPL
2008
Springer
91views Hardware» more  FPL 2008»
15 years 8 months ago
Power efficient DSP datapath configuration methodology for FPGA
Exploiting the underutilisation of variable-length DSP algorithms during normal operation is vital, when seeking to maximise the achievable functionality of an application within ...
Stephen McKeown, Roger Woods, John McAllister
KBS
2007
76views more  KBS 2007»
15 years 6 months ago
What middleware for network centric operations?
The main intent of this paper is to address the issue of middleware in network centric operations. To this end, we characterize a set of Information Technology capabilities that s...
Ali Benssam, Jean Berger, Abdeslem Boukhtouta, Mou...
WWW
2003
ACM
16 years 7 months ago
Application specific data replication for edge services
The emerging edge services architecture promises to improve the availability and performance of web services by replicating servers at geographically distributed sites. A key chal...
Lei Gao, Michael Dahlin, Amol Nayate, Jiandan Zhen...
IWCMC
2006
ACM
16 years 14 days ago
Optimal hierarchical energy efficient design for MANETs
Due to the growing interest in mobile wireless Ad-Hoc networks’ (MANETs) applications, researchers have proposed many routing protocols that differ in their objective. Energy ef...
Wasim El-Hajj, Dionysios Kountanis, Ala I. Al-Fuqa...