898 search results - page 42 / 180 » An Analysis of Permutations in Arrays |
174
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CATA
2009
15 years 7 months ago
2009
ABSTRACT: We present a Built-In Self-Test (BIST) approach for programmable embedded memories in Xilinx Virtex-4 Field Programmable Gate Arrays (FPGAs). The target resources are the...
152
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GI
2009
Springer
15 years 4 months ago
2009
Springer
: This paper investigates a direct Target Motion Analysis (TMA) estimator for the problem of calculating the states (i.e. source positions, velocities, etc.) of multiple sources fr...
126
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CRYPTO
2005
Springer
15 years 11 months ago
2005
Springer
We present an improved bound on the advantage of any q-query adversary at distinguishing between the CBC MAC over a random n-bit permutation and a random function outputting n bit...
134
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ICCAD
2006
IEEE
16 years 3 months ago
2006
IEEE
We devise a central triangular sequence to minimize the escape routing layers in area array packaging. We use a network flow model to analyze the bottleneck of the routable pins. ...
170
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PADO
2001
Springer
15 years 10 months ago
2001
Springer
Abstract. We present a high-level approach to array bound check optimization that is neither hampered by recursive functions, nor disabled by the presence of partially redundant ch...