161 search results - page 9 / 33 » An Analysis of Delay Based PUF Implementations on FPGA |
165
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ICPP
1999
IEEE
15 years 10 months ago
1999
IEEE
The implementation of bounded-delay services over integrated services networks relies admission control mechanisms that in turn use end-to-end delay computation algorithms. For gu...
154
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DDECS
2007
IEEE
16 years 10 days ago
2007
IEEE
– The implementation and the fault simulation technique for the highly reliable digital design using two FPGAs under a processor control is presented. Two FPGAs are used for dupl...
151
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ISCAS
2007
IEEE
16 years 8 days ago
2007
IEEE
— We propose Differential Power Analysis (DPA) with a phase-based waveform matching technique. Conventionally, a trigger signal and a system clock are used to capture the wavefor...
153
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AHS
2006
IEEE
16 years 1 days ago
2006
IEEE
Domain-specific reconfigurable arrays have shown to provide an efficient trade-off between flexibility of FPGA and performance of ASIC circuit. Nonetheless, the design of these he...
170
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CCECE
2006
IEEE
16 years 1 days ago
2006
IEEE
Several approaches have been proposed to accelerate the NP-complete Boolean Satisfiability problem (SAT) using reconfigurable computing. We present an FPGA based clause evaluator,...