95 search results - page 6 / 19 » An Analog Integrated Circuit Design Laboratory |
151
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SBCCI
2006
ACM
15 years 12 months ago
2006
ACM
This paper presents a transistor optimization methodology for low-power analog integrated CMOS circuits, relying on the physics-based gm/ID characteristics as a design optimizatio...
252
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DAC
2009
ACM
16 years 7 months ago
2009
ACM
Efficient system-level design is increasingly relying on hierarchical design-space exploration, as well as compositional methods, to shorten time-to-market, leverage design re-use...
170
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DAC
2004
ACM
16 years 6 months ago
2004
ACM
Long design cycles due to the inability to predict silicon realities is a well-known problem that plagues analog/RF integrated circuit product development. As this problem worsens...
129
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ISCAS
2005
IEEE
15 years 11 months ago
2005
IEEE
We propose an analog current-mode subthreshold CMOS circuit implementing a neuromorphic oscillator. Our circuit is based on the half-center oscillator model proposed by Matsuoka, ...
146
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MSE
1999
IEEE
15 years 10 months ago
1999
IEEE
This paper presents a PC based software running on PC dedicated to the training in sub-micron CMOS VLSI design. The software firstly consists in a HDL-based schematic editor with ...