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ICS
1998
Tsinghua U.
15 years 11 months ago
Load Execution Latency Reduction
In order to achieve high performance, contemporary microprocessors must effectively process the four major instruction types: ALU, branch, load, and store instructions. This paper...
Bryan Black, Brian Mueller, Stephanie Postal, Ryan...
CCGRID
2010
IEEE
15 years 6 months ago
FaReS: Fair Resource Scheduling for VMM-Bypass InfiniBand Devices
In order to address the high performance I/O needs of HPC and enterprise applications, modern interconnection fabrics, such as InfiniBand and more recently, 10GigE, rely on network...
Adit Ranadive, Ada Gavrilovska, Karsten Schwan
BMCBI
2007
115views more  BMCBI 2007»
15 years 6 months ago
A novel, fast, HMM-with-Duration implementation - for application with a new, pattern recognition informed, nanopore detector
Background: Hidden Markov Models (HMMs) provide an excellent means for structure identification and feature extraction on stochastic sequential data. An HMM-with-Duration (HMMwD) ...
Stephen Winters-Hilt, Carl Baribault
ICPP
2009
IEEE
16 years 1 months ago
Using Standards-Based Interfaces to Share Data across Grid Infrastructures
—Data grids, such as the ones used by the high energy physics community, are used to share vast amounts of data across geographic locations. However, interactions with grid data ...
Karolina Sarnowska, Andrew S. Grimshaw, Erwin Laur...
IPSN
2005
Springer
16 years 5 days ago
Matched source-channel communication for field estimation in wireless sensor networks
Abstract— Sensing, processing and communication must be jointly optimized for efficient operation of resource-limited wireless sensor networks. We propose a novel source-channel...
Waheed Uz Zaman Bajwa, Akbar M. Sayeed, Robert D. ...
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