4302 search results - page 760 / 861 » Ambiguity as a resource for design |
178
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ISCA
2005
IEEE
15 years 12 months ago
2005
IEEE
Memory latency tolerant architectures support thousands of in-flight instructions without scaling cyclecritical processor resources, and thousands of useful instructions can compl...
173
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SAINT
2005
IEEE
15 years 12 months ago
2005
IEEE
The Mobile Internet scenario encourages the design and development of context-aware applications that provide results depending on context information, such as the relative positi...
150
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ISLPED
2005
ACM
15 years 12 months ago
2005
ACM
Modern processors can issue and execute multiple instructions per cycle, often performing multiple memory operations simultaneously. To reduce stalls due to resource conflicts, m...
180
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MOBICOM
2005
ACM
15 years 12 months ago
2005
ACM
In this paper we investigate the benefits of a heterogeneous architecture for wireless sensor networks composed of a few resource rich mobile nodes and a large number of simple s...
194
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SBCCI
2005
ACM
15 years 12 months ago
2005
ACM
Networks on chip (NoCs) draw on concepts inherited from distributed systems and computer networks subject areas to interconnect IP cores in a structured and scalable way. Congesti...