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DATE
2003
IEEE
112views Hardware» more  DATE 2003»
15 years 11 months ago
Transaction-Level Models for AMBA Bus Architecture Using SystemC 2.0
The concept of a SOC platform architecture introduces the concept of a communication infrastructure. In the transaction-level a finite set of architecture components (memories, ar...
Marco Caldari, Massimo Conti, Massimo Coppola, Ste...
DATE
2003
IEEE
118views Hardware» more  DATE 2003»
15 years 11 months ago
Transforming Structural Model to Runtime Model of Embedded Software with Real-Time Constraints
The model-based methodology has proven to be effective for fast and low-cost development of embedded software. In the model-based development process, transforming a software stru...
Sharath Kodase, Shige Wang, Kang G. Shin
DSD
2003
IEEE
138views Hardware» more  DSD 2003»
15 years 11 months ago
A Two-step Genetic Algorithm for Mapping Task Graphs to a Network on Chip Architecture
Network on Chip (NoC) is a new paradigm for designing core based System on Chip which supports high degree of reusability and is scalable. In this paper we describe an efficient t...
Tang Lei, Shashi Kumar
HICSS
2003
IEEE
260views Biometrics» more  HICSS 2003»
15 years 11 months ago
Automating Land Management: An Interpretive Analysis of Information Technology Management within the Bureau of Land Management
Given societies’ massive investment in information technology and the potentially catastrophic consequences of IT failures, it is becoming increasingly critical to understand ho...
John C. Beachboard
HICSS
2003
IEEE
138views Biometrics» more  HICSS 2003»
15 years 11 months ago
Towards Verifying Parametrised Hardware Libraries with Relative Placement Information
Abstract— This paper presents a framework for verifying compilation tools for parametrised hardware libraries with placement information. Such libraries are captured in Pebble, a...
Steve McKeever, Wayne Luk, Arran Derbyshire