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RECONFIG
2008
IEEE
268views VLSI» more  RECONFIG 2008»
16 years 1 months ago
Parametric, Secure and Compact Implementation of RSA on FPGA
1 We present a fast, efficient, and parameterized modular multiplier and a secure exponentiation circuit especially intended for FPGAs on the low end of the price range. The desig...
Ersin Oksuzoglu, Erkay Savas
IPPS
2006
IEEE
16 years 22 days ago
An overview of data aggregation architecture for real-time tracking with sensor networks
Abstract— Since sensor nodes normally have limited resources in terms of energy, bandwidth and computation capability, efficiency is a key design goal in sensor network research...
Tian He, Lin Gu, Liqian Luo, Ting Yan, John A. Sta...
IPPS
2005
IEEE
16 years 9 days ago
A Compiler and Runtime Infrastructure for Automatic Program Distribution
This paper presents the design and the implementation of a compiler and runtime infrastructure for automatic program distribution. We are building a research infrastructure that e...
Roxana Diaconescu, Lei Wang, Zachary Mouri, Matt C...
ISQED
2005
IEEE
140views Hardware» more  ISQED 2005»
16 years 9 days ago
Toward Quality EDA Tools and Tool Flows Through High-Performance Computing
As the scale and complexity of VLSI circuits increase, Electronic Design Automation (EDA) tools become much more sophisticated and are held to increasing standards of quality. New...
Aaron N. Ng, Igor L. Markov
ISLPED
2005
ACM
111views Hardware» more  ISLPED 2005»
16 years 8 days ago
Peak temperature control and leakage reduction during binding in high level synthesis
Temperature is becoming a first rate design criterion in ASICs due to its negative impact on leakage power, reliability, performance, and packaging cost. Incorporating awareness o...
Rajarshi Mukherjee, Seda Ogrenci Memik, Gokhan Mem...