As technology scales down, power supply noise is becoming a performance and reliability bottleneck in modern VLSI. We propose a power supply noise-aware design methodology for hig...
Ultimate DDDAS success demands that DDDAS simulations be increasingly reconļ¬gurable and adaptable to a growing variety of runtime sensor feedback. Because we expect a simulationā...
David C. Brogan, Paul F. Reynolds Jr., Robert G. B...
Abstract. This paper introduces JHDLBits, the integration of two prominent FPGA design tools: JHDL and JBits. JHDLBits oļ¬ers the low-level access and control provided by JBits wi...
Alexandra Poetter, Jesse Hunter, Cameron Patterson...
Reconfigurable Computers based on a combination of conventional microprocessors and Field Programmable Gate Arrays (FPGAs) presents new challenges to designers. Debugging on such ...
Theerayod Wiangtong, Chun Te Ewe, Peter Y. K. Cheu...
By using a macro/micro state model we show how assumptions on the resolution of logical and physical timing of computation in computer systems has resulted in design methodologies...