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ISCA
2000
IEEE
121views Hardware» more  ISCA 2000»
15 years 10 months ago
Selective, accurate, and timely self-invalidation using last-touch prediction
Communication in cache-coherent distributed shared memory (DSM) often requires invalidating (or writing back) cached copies of a memory block, incurring high overheads. This paper...
An-Chow Lai, Babak Falsafi
SIGMETRICS
2000
ACM
177views Hardware» more  SIGMETRICS 2000»
15 years 10 months ago
A case for end system multicast
— The conventional wisdom has been that IP is the natural protocol layer for implementing multicast related functionality. However, more than a decade after its initial proposal,...
Yang-Hua Chu, Sanjay G. Rao, Hui Zhang
DAC
1999
ACM
15 years 10 months ago
Cycle and Phase Accurate DSP Modeling and Integration for HW/SW Co-Verification
We present our practical experience in the modeling and integration of cycle/phase-accurate instruction set architecture (ISA) models of digital signal processors (DSPs) with othe...
Lisa M. Guerra, Joachim Fitzner, Dipankar Talukdar...
ICNP
1999
IEEE
15 years 10 months ago
Effect of Unreliable Nodes on QoS Routing
A number of QoS routing algorithms have been proposed to address the dual objective of selecting feasible paths through the network with enough resources to satisfy a connections&...
Swapna S. Gokhale, Satish K. Tripathi
ICS
1999
Tsinghua U.
15 years 10 months ago
Improving the performance of bristled CC-NUMA systems using virtual channels and adaptivity
Current high-end parallel systems achieve low-latency, highbandwidth network communication through the use of aggressive design techniques and expensive mechanical and electrical ...
José F. Martínez, Josep Torrellas, J...