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FROCOS
2009
Springer
15 years 10 months ago
Efficient Combination of Decision Procedures for MUS Computation
In recent years, the problem of extracting a MUS (Minimal Unsatisfiable Subformula) from an unsatisfiable CNF has received much attention. Indeed, when a Boolean formula is proved ...
Cédric Piette, Youssef Hamadi, Lakhdar Sais
DATE
2004
IEEE
184views Hardware» more  DATE 2004»
15 years 10 months ago
Automatic Verification of Safety and Liveness for XScale-Like Processor Models Using WEB Refinements
We show how to automatically verify that complex XScale-like pipelined machine models satisfy the same safety and liveness properties as their corresponding instruction set archit...
Panagiotis Manolios, Sudarshan K. Srinivasan
DAC
1995
ACM
15 years 10 months ago
Hierarchical Optimization of Asynchronous Circuits
Abstract— Many asynchronous designs are naturally specified and implemented hierarchically as an interconnection of separate asynchronous modules that operate concurrently and c...
Bill Lin, Gjalt G. de Jong, Tilman Kolks
ITC
1991
IEEE
86views Hardware» more  ITC 1991»
15 years 10 months ago
Test Pattern Generation for Realistic Bridge Faults in CMOS ICs
Two approaches have been used to balance the cost of generating e ective tests for ICs and the need to increase the ICs' quality level. The rst approach favorsusing high-leve...
F. Joel Ferguson, Tracy Larrabee
ET
2000
80views more  ET 2000»
15 years 6 months ago
A New Method for Testing Re-Programmable PLAs
: We present a method for obtaining a minimal set of test configurations and their associated set oftest patterns that completely tests re-programmable Programmable Logic Arrays (P...
Charles E. Stroud, James R. Bailey, Johan R. Emmer...