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213
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ISCAPDCS
2004
15 years 7 months ago
2004
The cache hierarchy design in existing SMT and superscalar processors is optimized for latency, but not for bandwidth. The size of the L1 data cache did not scale over the past de...
183
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KDID
2004
15 years 7 months ago
2004
We are designing new data mining techniques on boolean contexts to identify a priori interesting bi-sets (i.e., sets of objects or transactions associated to sets of attributes or ...
162
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AAAI
1990
15 years 7 months ago
1990
Knowledge processing is very demanding on computer architectures. Knowledge processing generates subcomputation paths at an exponential rate. It is memory intensive and has high c...
177
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CCS
2010
ACM
15 years 7 months ago
2010
ACM
Securing wireless sensor networks against node capture is a challenging task. All well-known random key pre-distribution systems, including the Eschenauer and Gligor's pionee...
180
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SIGCOMM
2010
ACM
15 years 6 months ago
2010
ACM
Data center networks encode locality and topology information into their server and switch addresses for performance and routing purposes. For this reason, the traditional address...