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DAC
2008
ACM
15 years 8 months ago
Application mapping for chip multiprocessors
The problem attacked in this paper is one of automatically mapping an application onto a Network-on-Chip (NoC) based chip multiprocessor (CMP) architecture in a locality-aware fas...
Guangyu Chen, Feihui Li, Seung Woo Son, Mahmut T. ...
DAC
2008
ACM
15 years 8 months ago
DeMOR: decentralized model order reduction of linear networks with massive ports
Model order reduction is an efficient technique to reduce the system complexity while producing a good approximation of the input-output behavior. However, the efficiency of reduc...
Boyuan Yan, Lingfei Zhou, Sheldon X.-D. Tan, Jie C...
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DALT
2008
Springer
15 years 8 months ago
Abstracting and Verifying Strategy-Proofness for Auction Mechanisms
ing and Verifying Strategy-proofness for Auction Mechanisms E. M. Tadjouddine, F. Guerin, and W. Vasconcelos Department of Computing Science, King's College, University of Abe...
Emmanuel M. Tadjouddine, Frank Guerin, Wamberto We...
GLVLSI
2007
IEEE
158views VLSI» more  GLVLSI 2007»
15 years 8 months ago
RT-level vector selection for realistic peak power simulation
We present a vector selection methodology for estimating the peak power dissipation in a CMOS logic circuit. The ultimate goal is to combine the speed of RT-level simulation with ...
Chia-Chien Weng, Ching-Shang Yang, Shi-Yu Huang
DEBS
2008
ACM
15 years 8 months ago
Extending Siena to support more expressive and flexible subscriptions
This paper defines and discusses the implementation of two novel extensions to the Siena Content-based Network (CBN) to extend it to become a Knowledge-based Network (KBN) thereby...
John Keeney, Dominik Roblek, Dominic Jones, David ...
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