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ISLPED
2005
ACM
85views Hardware» more  ISLPED 2005»
16 years 10 days ago
A low-power crossroad switch architecture and its core placement for network-on-chip
As the number of cores on a chip increases, power consumed by the communication structures takes significant portion of the overall power-budget. The individual components of the...
Kuei-Chung Chang, Jih-Sheng Shen, Tien-Fu Chen
MSN
2005
Springer
179views Sensor Networks» more  MSN 2005»
16 years 8 days ago
Coverage Analysis for Wireless Sensor Networks
The coverage problem in wireless sensor networks (WSNs) is to determine the number of active sensor nodes needed to cover the sensing area. The purpose is to extend the lifetime of...
Ming Liu, Jiannong Cao, Wei Lou, Lijun Chen 0006, ...
EGH
2004
Springer
16 years 5 days ago
A flexible simulation framework for graphics architectures
In this paper we describe a multipurpose tool for analysis of the performance characteristics of computer graphics hardware and software. We are developing Qsilver, a highly con...
Jeremy W. Sheaffer, David P. Luebke, Kevin Skadron
GLVLSI
2003
IEEE
132views VLSI» more  GLVLSI 2003»
16 years 2 days ago
Power-aware pipelined multiplier design based on 2-dimensional pipeline gating
Power-awareness indicates the scalability of the system energy with changing conditions and quality requirements. Multipliers are essential elements used in DSP applications and c...
Jia Di, Jiann S. Yuan
HIPC
2003
Springer
15 years 12 months ago
FV-MSB: A Scheme for Reducing Transition Activity on Data Buses
Power consumption becomes an important issue for modern processors. The off-chip buses consume considerable amount of total power [9,7]. One effective way to reduce power is to red...
Dinesh C. Suresh, Jun Yang 0002, Chuanjun Zhang, B...