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SCCC
1998
IEEE
15 years 11 months ago
Parallel Generation of Inverted Files for Distributed Text Collections
We present a scalable algorithm for the parallel computation of inverted files for large text collections. The algorithm takes into account an environment of a high bandwidth netw...
Berthier A. Ribeiro-Neto, Joao Paulo Kitajima, Gon...
DATE
2007
IEEE
109views Hardware» more  DATE 2007»
16 years 1 months ago
System level clock tree synthesis for power optimization
The clock tree is the interconnect net on Systems-on-Chip (SoCs) with the heaviest load and consumes up to 40% of the overall power budget. Substantial savings of the overall powe...
Saif Ali Butt, Stefan Schmermbeck, Jurij Rosenthal...
DATE
2006
IEEE
85views Hardware» more  DATE 2006»
16 years 23 days ago
Optimizing high speed arithmetic circuits using three-term extraction
Carry Save Adder (CSA) trees are commonly used for high speed implementation of multi-operand additions. We present a method to reduce the number of the adders in CSA trees by ext...
Anup Hosangadi, Farzan Fallah, Ryan Kastner
HICSS
2000
IEEE
104views Biometrics» more  HICSS 2000»
15 years 11 months ago
Placement of Dispersed Generations Systems for Reduced Losses
Recent improvements in fuel cell technology along with an increasing demand for small generator units have led to renewed interest in dispersed generation units. This work demonst...
T. Griffin, K. Tomsovic, D. Secrest, A. Law
PATMOS
2000
Springer
15 years 10 months ago
Data-Reuse and Parallel Embedded Architectures for Low-Power, Real-Time Multimedia Applications
Exploitation of data re-use in combination with the use of custom memory hierarchy that exploits the temporal locality of data accesses may introduce significant power savings, esp...
Dimitrios Soudris, Nikolaos D. Zervas, Antonios Ar...