Sciweavers

20778 search results - page 227 / 4156
» Algorithms for Data Migration
Sort
View
FPGA
2009
ACM
188views FPGA» more  FPGA 2009»
16 years 1 months ago
Clock power reduction for virtex-5 FPGAs
Clock network power in field-programmable gate arrays (FPGAs) is considered and two complementary approaches for clock power reduction in the Xilinx R VirtexTM -5 FPGA are presen...
Qiang Wang, Subodh Gupta, Jason Helge Anderson
EUROPAR
2009
Springer
16 years 1 months ago
Scheduling Recurrent Precedence-Constrained Task Graphs on a Symmetric Shared-Memory Multiprocessor
Abstract. We consider approaches that allow task migration for scheduling recurrent directed-acyclic-graph (DAG) tasks on symmetric, shared-memory multiprocessors (SMPs) in order t...
UmaMaheswari C. Devi
DATE
2007
IEEE
78views Hardware» more  DATE 2007»
16 years 25 days ago
Hardware scheduling support in SMP architectures
In this paper we propose a hardware real time operating system (HW-RTOS) that implements the OS layer in a dual-processor SMP architecture. Intertask communication is specified b...
André C. Nácul, Francesco Regazzoni,...
IPPS
2006
IEEE
16 years 16 days ago
Free network measurement for adaptive virtualized distributed computing
An execution environment consisting of virtual machines (VMs) interconnected with a virtual overlay network can use the naturally occurring traffic of an existing, unmodified ap...
Ashish Gupta, Marcia Zangrilli, Ananth I. Sundarar...
SC
2003
ACM
15 years 11 months ago
Job Superscheduler Architecture and Performance in Computational Grid Environments
Computational grids hold great promise in utilizing geographically separated heterogeneous resources to solve large-scale complex scientific problems. However, a number of major ...
Hongzhang Shan, Leonid Oliker, Rupak Biswas