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ICCAD
2005
IEEE
130views Hardware» more  ICCAD 2005»
16 years 3 months ago
A cache-defect-aware code placement algorithm for improving the performance of processors
— Yield improvement through exploiting fault-free sections of defective chips is a well-known technique [1][2]. The idea is to partition the circuitry of a chip in a way that fau...
Tohru Ishihara, Farzan Fallah
165
Voted
NIPS
1994
15 years 8 months ago
A Non-linear Information Maximisation Algorithm that Performs Blind Separation
A new learning algorithmis derived which performs online stochastic gradient ascent in the mutual informationbetween outputs and inputs of a network. In the absence of a priori kn...
Anthony J. Bell, Terrence J. Sejnowski
198
Voted
ICPR
2010
IEEE
15 years 7 months ago
A Constant Average Time Algorithm to Allow Insertions in the LAESA Fast Nearest Neighbour Search Index
Abstract—Nearest Neighbour search is a widely used technique in Pattern Recognition. In order to speed up the search many indexing techniques have been proposed. However, most of...
Luisa Micó, José Oncina
IJCV
2002
84views more  IJCV 2002»
15 years 6 months ago
Algorithmic Fusion for More Robust Feature Tracking
We present a framework for merging the results of independent featurebased motion trackers using a classification based approach. We demonstrate the efficacy of the framework usin...
Brendan McCane, Ben Galvin, Kevin Novins
PIMRC
2010
IEEE
15 years 4 months ago
On the detection probability of parallel code phase search algorithms in GPS receivers
The first stage of the signal processing chain in a Global Positioning System (GPS) receiver is the acquisition, which provides for a desired satellite coarse code phase and Dopple...
Bernhard Geiger, Michael Soudan, Christian Vogel