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TVLSI
2010
15 years 1 months ago
LOPASS: A Low-Power Architectural Synthesis System for FPGAs With Interconnect Estimation and Optimization
In this paper, we present a low-power architectural synthesis system (LOPASS) for field-programmable gate-array (FPGA) designs with interconnect power estimation and optimization. ...
Deming Chen, Jason Cong, Yiping Fan, Lu Wan
DAC
2011
ACM
14 years 6 months ago
Throughput maximization for periodic real-time systems under the maximal temperature constraint
We study the problem on how to maximize the throughput for a periodic real-time system under the given peak temperature constraint. We assume that different tasks in our system ma...
Huang Huang, Gang Quan, Jeffrey Fan, Meikang Qiu
NOSSDAV
1995
Springer
15 years 10 months ago
Determining End-to-End Delay Bounds in Heterogeneous Networks
We define a class of Guaranteed Rate (GR) scheduling algorithms. The GR class includes Virtual Clock, Packet-byPacket Generalized Processor Sharing and Self Clocked Fair Queuing....
Pawan Goyal, Simon S. Lam, Harrick M. Vin
WECWIS
2003
IEEE
82views ECommerce» more  WECWIS 2003»
15 years 12 months ago
Property Propagation Rules for Prioritizing and Synchronizing Trading Activities
With the growing number of marketplaces and trading partners in the e–commerce environment, software tools designed to act on behalf of human traders are increasingly used to au...
Yain-Whar Si, David Edmond, Arthur H. M. ter Hofst...
ICPP
1995
IEEE
15 years 10 months ago
Sorting and Selection on Distributed Memory Bus Computers
In this paper we study the problems of sorting and selection on the Distributed Memory Bus Computer (DMBC) recently introduced by Sahni. In particular we present: 1) An efficient a...
Sanguthevar Rajasekaran, Sartaj Sahni