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DATE
2002
IEEE
105views Hardware» more  DATE 2002»
15 years 11 months ago
Power-Manageable Scheduling Technique for Control Dominated High-Level Synthesis
Optimizing power consumption at high-level is a critical step towards power-efficient digital system designs. This paper addresses the power management problem by scheduling a giv...
Chunhong Chen, Majid Sarrafzadeh
ICMCS
2006
IEEE
142views Multimedia» more  ICMCS 2006»
16 years 9 days ago
Complexity Analysis of H.264 Decoder for FPGA Design
— A major challenge in the design of any real time system is the proper selection of implementation and platform alternatives. In this paper, a suitable FPGA-based design of the ...
Tuomas Lindroth, Nastooh Avessta, Jukka Teuhola, T...
JSC
2007
119views more  JSC 2007»
15 years 6 months ago
Equisingular calculations for plane curve singularities
We present an algorithm which, given a deformation with section of a reduced plane curve singularity, computes equations for the equisingularity stratum (that is, the µ-constant s...
Antonio Campillo, Gert-Martin Greuel, Christoph Lo...
WSC
1998
15 years 7 months ago
An Object-Oriented Environment for Fast Simulation Using Compiler Techniques
In this paper, an efficient simulation environment that utilizes compiler techniques to speed up simulation is presented. The method is based on the utilization of flexible, proce...
Yiqing Huang, Ravishankar K. Iyer
RTCSA
1999
IEEE
15 years 10 months ago
Pipeline Timing Analysis Using a Trace-Driven Simulator
In this paper we present a technique for Worst-Case Execution Time WCET analysis for pipelined processors. Our technique uses a standard simulator instead of special-purpose pipel...
Jakob Engblom, Andreas Ermedahl