1 We present a fast, efficient, and parameterized modular multiplier and a secure exponentiation circuit especially intended for FPGAs on the low end of the price range. The desig...
This paper describes a novel approach to generate an optimized schedule to run threads on distributed shared memory (DSM) systems. The approach relies upon a binary instrumentatio...
— This paper considers a fading relay channel where the total transmit power used is constrained to be equal to that of the standard single-hop channel. The relay channel used op...
Allan J. Jardine, Steve McLaughlin, John S. Thomps...
Power-aware processors operate in various power modes to reduce energy consumption with a corresponding decrease in peak processor throughput. Recent work has shown power-aware cl...
— In the field of mobile robotics, trajectory details are seldom taken into account to qualify robot performance. Most metrics rely mainly on global results such as the total ti...