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SIGGRAPH
1996
ACM
15 years 11 months ago
VC-1: A Scalable Graphics Computer with Virtual Local Frame Buffers
The VC-1 is a parallel graphics machine for polygon rendering based on image composition. This paper describes the architecture of the VC-1 along with a parallel polygon rendering...
Satoshi Nishimura, Tosiyasu L. Kunii
EURODAC
1994
IEEE
145views VHDL» more  EURODAC 1994»
15 years 11 months ago
Testability analysis and improvement from VHDL behavioral specifications
This paper presents a testability improvement method for digital systems described in VHDL behavioral specification. The method is based on testability analysis at registertransfe...
Xinli Gu, Krzysztof Kuchcinski, Zebo Peng
DAC
1994
ACM
15 years 10 months ago
A Modular Partitioning Approach for Asynchronous Circuit Synthesis
Asynchronous circuits are crucial in designing low power and high performance digital systems. In this paper, we present an ecient modular partitioning approach for asynchronous c...
Ruchir Puri, Jun Gu
EUROPAR
2006
Springer
15 years 10 months ago
Tying Memory Management to Parallel Programming Models
Stand-alone threading libraries lack sophisticated memory management techniques. In this paper, we present a methodology that allows threading libraries that implement non-preempti...
Ioannis E. Venetis, Theodore S. Papatheodorou
CONCUR
2000
Springer
15 years 10 months ago
Model Checking with Finite Complete Prefixes Is PSPACE-Complete
Unfoldings are a technique for verification of concurrent and distributed systems introduced by McMillan. The method constructs a finite complete prefix, which can be seen as a sym...
Keijo Heljanko