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DFT
2003
IEEE
142views VLSI» more  DFT 2003»
16 years 3 days ago
Exploiting Instruction Redundancy for Transient Fault Tolerance
This paper presents an approach for integrating fault-tolerance techniques into microprocessors by utilizing instruction redundancy as well as time redundancy. Smaller and smaller...
Toshinori Sato
SBRN
2000
IEEE
15 years 11 months ago
Non-Linear Modelling and Chaotic Neural Networks
This paper proposes a simple methodology to construct an iterative neural network which mimics a given chaotic time series. The methodology uses the Gamma test to identify a suita...
Antonia J. Jones, Steve Margetts, Peter Durrant, A...
DATE
1999
IEEE
129views Hardware» more  DATE 1999»
15 years 11 months ago
Battery-Powered Digital CMOS Design
In this paper, we consider the problem of maximizing the battery life (or duration of service) in battery-powered CMOS circuits. We first show that the battery efficiency (or utili...
Massoud Pedram, Qing Wu
ICFP
1998
ACM
15 years 11 months ago
Intensional Polymorphism in Type-Erasure Semantics
Intensional polymorphism, the ability to dispatch to different routines based on types at run time, enables a variety of advanced implementation techniques for polymorphic languag...
Karl Crary, Stephanie Weirich, J. Gregory Morriset...
SIGMOD
1996
ACM
120views Database» more  SIGMOD 1996»
15 years 11 months ago
Implementing Data Cubes Efficiently
Decision support applications involve complex queries on very large databases. Since response times should be small, query optimization is critical. Users typically view the data ...
Venky Harinarayan, Anand Rajaraman, Jeffrey D. Ull...