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LCPC
1998
Springer
15 years 11 months ago
A Loop Transformation Algorithm Based on Explicit Data Layout Representation for Optimizing Locality
We present a cache locality optimization technique that can optimize a loop nest even if the arrays referenced have different layouts in memory. Such a capability is required for a...
Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhar...
ICCAD
1994
IEEE
65views Hardware» more  ICCAD 1994»
15 years 11 months ago
Incremental formal design verification
Language containment is a method for design verification that involves checking if the behavior of the system to be verified is a subset of the behavior of the specifications (pro...
Gitanjali Swamy, Robert K. Brayton
CCS
2009
ACM
15 years 11 months ago
On the difficulty of software-based attestation of embedded devices
Device attestation is an essential feature in many security protocols and applications. The lack of dedicated hardware and the impossibility to physically access devices to be att...
Claude Castelluccia, Aurélien Francillon, D...
CODES
2004
IEEE
15 years 10 months ago
Optimizing the memory bandwidth with loop fusion
The memory bandwidth largely determines the performance and energy cost of embedded systems. At the compiler level, several techniques improve the memory bandwidth at the scope of...
Paul Marchal, José Ignacio Gómez, Fr...
CASES
2006
ACM
15 years 10 months ago
Power efficient branch prediction through early identification of branch addresses
Ever increasing performance requirements have elevated deeply pipelined architectures to a standard even in the embedded processor domain, requiring the incorporation of dynamic b...
Chengmo Yang, Alex Orailoglu