Sciweavers

4047 search results - page 305 / 810
» Algebraic Model Checking
Sort
View
DATE
2010
IEEE
138views Hardware» more  DATE 2010»
15 years 11 months ago
Checking and deriving module paths in Verilog cell library descriptions
—Module paths are often used to specify the delays of cells in a Verilog cell library description, which define the propagation delay for an event from an input to an output. Sp...
Matthias Raffelsieper, Mohammad Reza Mousavi, Chri...
WOODPECKER
2001
15 years 8 months ago
Consistency Checking of RM-ODP Specifications
Ensuring that specifications are consistent is an important part of specification development and testing. In this paper we introduce the ConsVISor tool for consistency checking o...
Kenneth Baclawski, Mieczyslaw M. Kokar, Jeffrey E....
ENTCS
2008
105views more  ENTCS 2008»
15 years 6 months ago
Checking Equivalence for Reo Networks
Constraint automata have been used as an operational model for component connectors described in the coordination language Reo which specifies the cooperation and communication of...
Tobias Blechmann, Christel Baier
EDBTW
2006
Springer
15 years 10 months ago
Models for Incomplete and Probabilistic Information
Abstract. We discuss, compare and relate some old and some new models for incomplete and probabilistic databases. We characterize the expressive power of c-tables over infinite dom...
Todd J. Green, Val Tannen
DAC
2002
ACM
16 years 7 months ago
A comparison of three verification techniques: directed testing, pseudo-random testing and property checking
This paper describes the verification of two versions of a bridge between two on-chip buses. The verification was performed just as the Infineon Technologies Design Centre in Bris...
Mike Bartley, Darren Galpin, Tim Blackmore